Mark D. Spiller : Research


Ongoing semiconductor technology advances are leading to increased design size and complexity, and functionality previously split across multiple chips is being consolidated into single, integrated designs. As a result, geographically distributed design experts are being pulled together into tightly-coupled, collaborative "virtual" teams with a shared set of constraints. This integration introduces new challenges in the management of Electronic Design Automation (EDA) design data and associated resources across the enterprise. Unfortunately, little guidance exists as to how resources and design activities should be optimally allocated.

In this research I present a framework for the investigation of the various design choices for distributed data and resource management in EDA. Data gathered from industry sources is used to develop and validate a set of models that represent modern design characteristics, along with recent trends in computation, organizations, and methodology. This data is incorporated in an event-driven simulator to animate the model for the data-intensive phases of the EDA design process. Given a set of desired functionalities and design constraints (time, cost, etc.) as inputs, the simulation environment can be used to compute a set of output metrics, such as average run time and estimated resource cost. As part of this work, a large set of simulation runs has been used to model the effects of various design scenarios and resource constraints. The observed results pinpoint several potential bottlenecks in the current design process and suggest a set of resource allocation strategies to overcome them. The simulation environment developed serves as a proof-of-concept for a proposed design-planning tool that would take a set of desired functionalities and design constraints as inputs and would return a list of development options along with their associated performance trade-offs.

Selected Publications

Selected Presentations